1. Field of the Invention
The present invention relates to a method of manufacturing a printed wiring board comprising the step of efficiently forming a metal film by electroplating to provide a plurality of circuit patterns isolated from each other on a substrate.
2. Disclosure of the Prior Art
In a conventional method of manufacturing printed wiring boards, a metal thin film is first formed on a substrate, and required regions of the metal thin film are removed by using a laser beam to form patterns of the metal thin film on the substrate. Then, electroplating is performed to form an additional metal film on the patterns of the metal thin film, so that the circuit patterns having an increased thickness is obtained on the substrate.
However, when the patterns of the metal thin film on the substrate are electrically isolated from each other, the electroplating step becomes very complicated. For example, when a circuit pattern 30 is electrically insulated from the circuit pattern 32, as shown in FIG. 20, it is required to individually perform electroplating with respect to each of these isolated circuit patterns to form addition metal films thereon. As a result, an increase in production cost is caused by an extension of time required for the electroplating step. In addition, a quality of the plating solution must be very often checked.
On the other hand, by providing a feeder circuit for electroplating to each of the isolated circuit patterns, it is possible to form the additional films on the isolated circuit patterns at a time by electroplating. However, in this method, there is a limitation in manufacturing printed wiring boards with high-density circuit patterns. That is, as the density of circuit patterns is higher, a reliability of the circuit patterns formed by electroplating deteriorates.
To eliminate the above-described inconveniences, U.S. Pat. No. 5,494,781 discloses an improved method of manufacturing a printed wiring board. According to this method, it is possible to simultaneously form the additional metal films on the isolated circuit patterns by electroplating without supplying electric current to the isolated circuit patterns through the feeder circuits.
That is, as shown in FIG. 21A, by pattering a metal thin film formed on the substrate, circuit patterns (30P, 32P) isolated from each other and a conductive layer 40P extending therebetween are provided on the substrate. After a resist film 90P is formed on the conductive layer 40P, electroplating is performed by the passage of electric current through the isolated circuit patterns (30P, 32P) connected by the conductive layer 40P to simultaneously form an additional metal film 50P on these circuit patterns, as shown in FIG. 21B. At this time, since the conductive layer 40P is covered with the resist film 90P, the additional film 50P is not formed on the conductive layer. After the electroplating, the resist film 90P is removed to expose the conductive layer 40P, and the conductive layer 40P is removed by soft etching to make an electrical insulation between the isolated circuit patterns (30P, 32P), as shown in FIG. 21C.
However, since the step of forming the resist film 90P on the conductive layer 40P is needed, it leads to an increase in production cost. In particular, when forming a three-dimensional circuit pattern on a substrate for MID (molded interconnect device), or manufacturing a high-density printed wiring board, the difficulty of forming the resist film on the conductive layer comes into a problem. In addition, when the removal of the conductive layer 40P after the electroplating is not enough, there is a fear that insulation failure occurs.
Therefore, a concern of the present invention is to provide a method of manufacturing a printed wiring board, which is characterized in that a metal film can be formed on the circuit patterns at a time by electroplating without the formation of a resist film on a conductive layer extending between circuit patterns isolated from each other, and after the electroplating the conductive layer can be easily removed with reliability to provide electrical insulation between the circuit patterns. That is, the method of the present invention comprises the steps of:
providing a substrate with at least one of a projection and a concave;
forming a first circuit pattern on the substrate;
forming a second circuit pattern isolated from the first circuit pattern on the substrate;
wherein when the substrate has the projection, the method comprises the steps of:
forming a first conductive layer on the projection to make a temporary electrical connection between the first and second circuit patterns;
performing electroplating by the passage of electric current through the first and second circuit patterns connected by the first conductive layer to simultaneously form a metal film on the first and second circuit patterns; and
after the electroplating, removing the first conductive layer on the projection to provide electrical insulation between the first and second circuit patterns;
wherein when the substrate has the concave, the method comprises the steps of:
covering the concave with a material different from the substrate to obtain a cover portion;
forming a second conductive layer on the cover portion to make a temporary electrical connection between the first and second circuit patterns;
performing electroplating by the passage of electric current through the first and second circuit patterns connected by the second conductive layer to simultaneously form a metal film on the first and second circuit patterns; and
after the electroplating, removing the second conductive layer on the cover portion to provide electrical insulation between the first and second circuit patterns.
It is preferred that substrate with at least one of the projection and the concave is formed by means of integral molding.
It is also preferred that the substrate has a plurality of projections, which are formed such that tops of the projections are substantially flush with each other.
To improve manufacturing efficiency, it is particularly preferred that the first circuit pattern, the second circuit pattern and the first conductive layer are provided at a time by patterning a metal thin film formed on the substrate. Similarly, when the substrate has the concave, it is preferred that the first circuit pattern, the second circuit pattern and the second conductive layer are provided at a time by patterning a metal thin film formed on the substrate after the concave is covered with the material.
In addition, the present invention presents a method of more efficiently manufacturing the printed circuit board. That is, the method comprises:
forming a metal thin film on a substrate having a projection;
providing an initial circuit pattern on the substrate by patterning the metal thin film, the initial circuit pattern comprising first and second circuit patterns isolated from each other and a conductive layer formed on the projection to make a temporary electrical connection between the first and second circuit patterns;
performing electroplating by the passage of electric current through the initial circuit pattern to form an additional metal film on the initial circuit pattern; and
after the electroplating, removing the conductive layer on the projection to provide electrical insulation between the first and second circuit patterns.
In particular, when it is required to form three-dimensional circuit patterns on a substrate for MID or manufacture a high-density printed wiring board, it is preferred to use the following method of manufacturing a printed wiring board.
That is the method of the present invention comprises the steps of:
providing a substrate with a first surface having a first projection and a second surface extending at a different level from the first surface and having a second projection thereon;
forming a first circuit pattern on the first surface;
forming a second circuit pattern isolated from the first circuit pattern on the second surface;
forming a third circuit pattern isolated from the first and second circuit patterns so as to extend from the first surface to the second surface;
forming a first conductive layer on the first projection to make a temporary electrical connection between the first and third circuit patterns;
forming a second conductive layer on the second projection to make a temporary electrical connection between the second and third circuit patterns;
performing electroplating by the passage of electric current through the first, second and third circuit patterns connected by the first and second conductive layers to simultaneously form a metal film on the first, second and third circuit patterns; and
after the electroplating, removing the first and second conductive layers on the first and second projections to provide electrical insulation among the first, second and third circuit patterns.
In the above method, it is preferred that the first and second projections are formed that a top of the first projection is substantially flush with the top of the second projection, and the first and second conductive layers on the first and second projections are removed at a time.
Another concern of the present invention is to provide a substrate used in the method of the present invention, and having at least one of a projection and a concave, which is adapted to form a conductive layer for making a temporary electrical connection between circuit patterns isolated from each other on the substrate, in order to simultaneously form a metal film on the circuit patterns connected by the conductive layer by electroplating.
In particular, it is preferred that the substrate is provided with a first surface having a first projection and a second surface extending at a different level from the first surface and having a second projection formed such that a top of the first projection is substantially flush with the top of the second projection, and wherein each of the first and second projections is adapted to form a conductive layer for making a temporary electrical connection between circuit patterns isolated from each other on the substrate, in order to simultaneously form a metal film on the circuit patterns connected by the conductive layer by electroplating.
These and still other objects and advantages of the present invention will become more apparent from preferred embodiments of the present invention explained in detail below, referring to the attached drawings.
The present disclosure relates to subject matters contained in Japanese Patent applications No. 2001-151382 and No. 2001-151383, which were filed on May 21, 2001, the disclosure of which is expressly incorporated herein by reference in its entirety.